This is a small earthquake in AI data center architecture. According to the post published by NVIDIA Newsroom on September 10, 2026, d-Matrix — a specialist in inference-dedicated chips — will use NVLink Fusion to hook its upcoming Raptor XPUs into the NVIDIA ecosystem. In plain terms: a chip not designed by NVIDIA will communicate natively with the giant's GPUs, networking and racks. Until now, NVLink was the proprietary bond welding NVIDIA GPUs together. That era is ending.
What was announced
Per the official announcement, d-Matrix will connect its next-generation Raptor XPUs to NVIDIA's AI infrastructure platform via NVLink Fusion. The scope is precise — and broad:
- NVLink scale-up: the high-bandwidth interconnect inside the rack, the one that lets accelerators talk to each other.
- Spectrum-X scale-out: NVIDIA's Ethernet networking layer linking racks together at cluster scale.
- The MGX rack architecture: NVIDIA's modular reference chassis, which thereby becomes able to host third-party chips.
- The broader NVIDIA AI platform: software, system stack and associated tooling.
According to NVIDIA, d-Matrix joins "a growing roster of ecosystem partners" — in other words, Raptor is not a one-off, and NVLink Fusion positions itself as a structured openness program, not an exception.
Three concrete advantages
- Native heterogeneous interconnect. A d-Matrix XPU can talk to NVIDIA infrastructure without a homegrown bridge; for the data center operator, that removes a custom integration layer — a source of latency and bugs.
- Silicon specialization. Raptor chips are built for inference; per the announcement, they plug into the same NVLink fabric as the rest of the rack, letting operators mix inference-optimized silicon with existing infrastructure instead of rebuying everything.
- An open MGX rack. The MGX architecture becomes a hosting standard for third-party chips, which reduces total lock-in risk for infrastructure buyers.
Three opportunities it opens
- For European and sovereign clouds: the ability to compose racks mixing NVIDIA GPUs and specialized XPUs could likely push down the cost per token at inference — the heaviest line item in production.
- For custom chip makers: NVLink Fusion sketches a clear go-to-market path — design a chip, certify it on the NVIDIA ecosystem, and address the same customers without rebuilding the entire networking stack.
- For infrastructure builders: multi-accelerator MGX architectures will likely become an experimentation ground for very high-volume inference pipelines, where every watt and every microsecond counts.
What remains to be verified
The announcement specifies neither an availability timeline for NVLink Fusion-connected Raptor chips nor the commercial terms of the program for future partners. The real-world performance of a hybrid rack — effective bandwidth, software stack behavior with third-party silicon — also remains to be proven in the field.
Would you mix third-party XPUs into your NVIDIA racks?
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Sources
- d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment (NVIDIA Newsroom)